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HCPL-0710-500E 8-pin DIP

Available in either an 8-pin DIP or SO-8 package style • +5 V CMOS compatibility respectively, the HCPL-7710 or HCPL-0710 optocouplers • 8 ns maximum pulse width distortion • 20 ns maximum prop. delay
8-pin DIP电源电压 VCC 6.0工作温度 TA +100传输速率 3. Mimimum Pulse Width is the

品牌说明

本型号为 AVAGO(安华高) 产品。安华高与博通(Broadcom)属于同一家公司:安华高 2005 年由安捷伦分拆上市,2016 年被博通收购,成为博通旗下半导体业务,业内常以 AVAGO/安华高/博通 混称。本页参数与规格书均取自该产品线原厂资料。

产品实拍图

本型号暂无已核对的专属实拍图。为避免图文不符,本页不放同系列近似图;如需实物照片,请联系销售获取本批次实拍。

产品应用与封装尺寸

图纸取自原厂规格书,点击可放大查看原始尺寸标注。

引脚定义与内部结构

引脚符号名称
5GND
6V
7NC
8V
数据来源:原厂规格书引脚图

关键参数速览

电源电压 VCC
6.0
工作温度 TA
+100
传输速率
3. Mimimum Pulse Width is the

产品特点 Features

  • Available in either an 8-pin DIP or SO-8 package style • +5 V CMOS compatibility respectively, the HCPL-7710 or HCPL-0710 optocouplers
  • 8 ns maximum pulse width distortion
  • 20 ns maximum prop. delay skew ing performance with very low power consumption. The
  • HCPL-x710 require only two bypass capacitors for complete • High speed: 12 Mbd
  • CMOS compatibility. • 40 ns maximum prop. delay
  • 10 kV/µs minimum common mode rejection
  • Basic building blocks of the HCPL-x710 are a CMOS LED
  • -40°C to 100°C temperature range driver IC, a high speed LED and a CMOS detector IC. A
  • CSA Component Acceptance Notice #5
  • Functional Diagram IEC/EN/DIN EN 60747-5-2
  • V = 630 Vpeak for HCPL-7710 Option 060
  • TRUTH TAIOBRMLE
  • (POSIT I–V EV LOG I=C )560 Vpeak for HCPL-0710 Option 060
  • **V 1 8 V ** IORM
  • DD1 DD2
  • V , INPUT LED1 V , OUTPUT

绝对最大额定值 Absolute Maximum Ratings(TA = 25°C)

超过下表数值可能造成器件永久损坏,设计时请留余量。

参数符号最小最大单位
Storage TemperatureT–55125°C
Ambient Operating TemperatureT–40+100°C
Supply VoltagesV , V DD1 DD206.0Volts
Input VoltageV I–0.5V +0.5 DD1Volts
Output VoltageV O–0.5V +0.5 DD2Volts
Input CurrentI–10+10mA
Average Output CurrentI10mA
Lead Solder Temperature260°C for10 sec., 1.6 mmbelow seatingplane
Solder Reflow Temperature ProfileSee SolderReflow TemperatureProfileSection
数据来源:原厂规格书

安全与绝缘额定值(DIN EN/IEC 60747−5−5)

单位条件
Minimum External Air L(I01) 7.1 4.9
Minimum External L(I02) 7.4 4.8
Minimum Internal Plastic 0.08 0.08
Tracking Resistance CTI ≥175
mmMeasured from input terminals to output
mmMeasured from input terminals to output
mmInsulation thickness between emitter and
VoltsDIN IEC 112/VDE 0303 Part 1
Material Group (DIN VDE 0110, 1/89, Table 1)
surface ofa printed circuit board between the solder fillets
of theinput and output leads must be considered. There
arerecommended techniques such as grooves and ribs
which maybe used on a printed circuit board to achieve
Tracking Resistance CTI ≥175
VoltsDIN IEC 112/VDE 0303 Part 1
Material Group (DIN VDE 0110, 1/89, Table 1)
surface ofa printed circuit board between the solder fillets
of theinput and output leads must be considered. There
arerecommended techniques such as grooves and ribs
which maybe used on a printed circuit board to achieve
desiredcreepage and clearances. Creepage and clearance
distances 4 0will also change depending on factors such as 15 12
Figure 4. Typical pulse width distortion vs. tempera-Figure 5. Typical rise time vs. temperature.
HCPL-0710 fig 4 29 )sn( TPLH 15HCPL-0710 fig 5 6 4 2 0
15 20 25 30 35 40 45 5015 20 25 30 35 40 45 50
CI (pF)CI (pF)
Figure 7. Typical propagation delays vs. output loadFigure 8. Typical pulse width distortion vs. output load
capacitance.capacitance.
10 7 6 LLAF 4 3 2 1STANDARD 8 PIN DIP PRODUCT 600 TUPNI 500 P REWOP 200 TUPTUO 100
0 5 10 15 20 25 30 350
- TNERRUC 700IS (mA)

电气特性 Electrical Characteristics(TA = 25°C)

参数符号最小典型最大单位测试条件
Logic Low InputI DD1L6.010.0mAV = 0 V I
Logic High InputI DD1H1.53.0mAV = V I DDI
Input Supply CurrentI13.0mA
Output Supply CurrentI5.511.0mA
Input CurrentI-1010µA
Logic High OutputV OH4.45.0VI = -20 µA, V = V O I IH
Voltage4.04.8I = -4 mA, V = V
Logic Low OutputV OL00.1VI = -20 µA, V = V O I IL
Voltage0.51.0I = -4 mA, V = V
Input-Output Momentary0710 V3750VrmsRH = 50%,
Withstand Voltage [8, 9, 10]t = 1 min., T = 25°C
ResistanceR1012WV = 500 Vdc
CapacitanceC0.6pFf = 1 MHz
Input IC Junction-to-Case-7710 q145°C/WThermocouple
Thermal Resistancelocated at center
Package Power DissipationP150mW
PHLIO
PLHIO

相关 / 可替代型号

以上型号来自规格书与型号命名比对,参数需以各自规格书为准;下单前请与销售确认封装与脚位。

订货信息与供货形式

型号RoHSNonRoHS2SurfaceGull包装Vrms/1IEC/EN/DIN
HCPL-0710and HCPL-7710are UL Recognizedwith 3750Vrms for1 minuteper UL1577.
PartRoHSNonRoHSSurfaceGullTapeVrms/1IEC/EN/DIN
numberCompliantCompliant PackageMountWing& ReelMinuteratingEN 60747-5-2 Quantity
HCPL-7710-320E-320XXX50 per tube
RoHScompliant optionwilluse ‘-XXXE‘.

应用领域 Applications

V I 2 7 NC* L ON LNC* 3 6 VMultiplexed data transmissionComputer peripheral interfaceGND 4 5 GNDPin 7 is not connected internally.Bypassing and PC Board LayoutVDD1 1 8C1 C2VI 2 7 NCNC 3 6 VOGND1 4 5 GND2

资料下载

规格书为原厂公开资料,点击在新窗口打开下载。

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